1. Field of the Invention
The present invention relates to a semiconductor device having a low dielectric constant film, and a method of manufacturing a semiconductor device with the low dielectric constant film. More specially, the present invention relates to a semiconductor device having a through hole and/or a groove (trench) while reducing deterioration of a low dielectric constant film in the manufacturing stage, and also to a method for manufacturing the semiconductor device having a low dielectric constant film. The through hole is employed to connect electrically wiring lines/patterns formed on and under the low dielectric constant film respectively. The groove is used to embed or bury the wiring lines/patterns into the low dielectric constant film.
2. Description of the Related Art
In general, electronic devices with using semiconductors require high-speed operations. More specifically, high-speed operation requirements are highly emphasized in logic devices.
Conventionally, as methods capable of operating semiconductor devices in high speeds, operating speeds of transistors are increased. On the other hand, while semiconductor devices are manufactured by realizing very fine structures, delays occurred in signals propagated through wiring lines/patterns would cause a serious problem, rather than delays occurred in signals due to parasitic capacitances of transistors.
In general, lengths of wiring lines employed in logic devices are made long. Under such a circumstance, it is usually required to suppress delays of signals propagated through wiring lines.
A speed of a signal propagated through a wiring line may be defined by multiplying a wiring line resistance (R) by a capacitance between wiring lines (C), namely a product (Rxc3x97C). When the value of this product (Rxc3x97C) is small, the speed of the signal propagated through the wiring line becomes fast, whereas when the value of this product (Rxc3x97C) is large, the speed of the signal propagated through the wiring line becomes delay.
To suppress a delay contained in a signal propagation speed, al least one of a wiring line resistance (R) and a capacitance (C) between wiring lines is required to be reduced. Conventionally, aluminum wiring lines have been employed to reduce wiring resistances (R). Recently, copper wiring lines having a lower resistance than that of aluminum wiring lines are examined to be used for the same purpose. On the other hand, conventionally, silicon oxide films and silicon nitride films are examined to be employed to form interlayer films for reducing capacitance (C) between wiring lines. Recently, various sorts of low dielectric constant films are examined to be used. These low dielectric constant films are made of either organic materials or inorganic materials, the dielectric constant of which is lower than that of the silicon oxide film, or silicon nitride film.
Very recently, as the low dielectric constant films capable of reducing the capacitance (C) between wiring lines, an HSQ (hydrogen silsesquioxane) film corresponding to an inorganic coating film is desirably employed.
When a low dielectric constant film is formed in a semiconductor device having a multi-layer wiring structure, a plug is necessarily formed to connect wiring lines (patterns) electrically formed on an upper layer and a lower layer of this low dielectric constant film. To this end, a through hole must be formed in the low dielectric constant film.
FIGS. 1A, 1B, and 1C are section views of schematically indicating one conventional forming step for forming a through hole in a low dielectric constant film.
First, as shown in FIG. 1A, a silicon oxide film 302 is formed on a semiconductor substrate 301. Subsequently, a silicon nitride film 303 is formed on this silicon oxide film. Next, an aluminum wiring line (pattern) 304 functioning as a lower-layer (under-layer) wiring line is formed in a groove (trench) which is formed in both the silicon oxide film 302 and the silicon nitride film 303. Thereafter, an HSQ (hydrogen silsesquioxane) film 305 functioning as an interlayer insulating film is formed on the entire portions of the silicon nitride film 303 and the aluminum wiring line 304. Next, a resist mask 306 is formed on this HSQ film 305. A dry etching treatment with this resist mask 306 is carried out for the HSQ film 305 to form a through hole 315 in this HSQ film 305. At this time, the over etching treatment is sufficiently performed to expose completely the aluminum wiring line 304 formed on the bottom portion of the through hole 315. As a result of the above manufacturing steps, the semiconductor structure shown as the section view of FIG. 1A is obtained.
There are many possibilities that the over-etched amount obtained by the above-described over-etching treatment becomes more than, or equal to 100 percents. At this time, a large number of deposited articles 311 made of aluminum compound are formed inside the through hole 315. This condition is illustratively shown as the section view of FIG. 1B.
Next, the resist mask 306 is stripped by employing oxygen plasma. Also, the deposited articles 311 formed inside the through hole 315 are removed by using organic solvent. Usually, the following organic solvent used in this removing process operation is used to remove the deposited articles 311 without melting metal aluminum, that is to say, solvent containing amine such as hidroxylamine. Thereafter, a conductive material made of copper is embedded within this through hole 315 to form a plug 307. As a result of the above manufacturing steps, the semiconductor structure shown as the section view of FIG. 1C is obtained.
The silicon nitride film 303 formed on the lower layer of the HSQ film 305 may function as the etching stopper to the silicon oxide film 302 formed on the lower layer when a misalignment is produced to the aluminum wiring line 304 in the step of forming the through hole 315. As a result, the silicon nitride film 303 can be used to prevent the silicon oxide film 302 from being etched away.
Although the above-described manufacturing steps are directed to forming of the plug 307 in the HSQ film 305, similar manufacturing steps may be applied when the groove wiring line is formed in the HSQ film 305. In particular, when the wiring line is made of copper, since the dry etching treatment can be hardly executed for the copper film, this groove wiring line may be used.
This HSQ film 305 is readily deteriorated in the case that this HSQ film 305 is reacted with the oxygen plasma or the organic solvent. Also as indicated in the above-explained manufacturing steps, the resist mask 306 is stripped by using the oxygen plasma, and the deposited articles 311 formed inside the through hole 315 are removed by using the organic solvent. While the above-described stripping process operation as well as removing process operation is carried out, since both the oxygen plasma and the organic solvent may give adverse influences to the surface of the HSQ film 305. As a result, an HSQ damaged portion 312 is produced on this surface of the HSQ film 305, and this HSQ film 305 would be deteriorated.
A concrete explanation will now be made of deterioration reaction of the above-explained HSQ film 305.
First, an HSQ film owns an Sixe2x80x94H coupling. This Sixe2x80x94H coupling is changed into an Sixe2x80x94OH coupling when the HSQ film reacts with oxygen plasma and organic solvent. As a result, the HSQ film will be changed into such a film having a moisture absorption characteristic. In such a case that the HSQ film contains water, a leak amount of a current in the plug 307 and the groove wiring line will be increased, and also a dielectric constant owned by this HSQ film is increased. Furthermore, since the HSQ film can readily absorb water, this water may corrode the metal copper and the metal aluminum, which are made in contact with this HSQ film. As a result, there are possibilities that the circuit performance would be lowered and also the circuit malfunction would be induced.
The above-described problems about the deterioration reaction of the HSQ film 305 may be similarly applied to another case. That is, instead of this HSQ film 305, an inorganic SOG (spin on glass) coating film having another low dielectric constant is employed as the low dielectric constant film. Similarly, this deterioration reaction problem may occur when a certain sort of organic SOG films is employed as this low dielectric constant film instead of the HSQ film 305.
The following conventional semiconductor device manufacturing methods related to forming of the through holes have been proposed as conventional examples.
First, Japanese Laid-open Patent Application (JP-A-Heisei 6-5711) describes xe2x80x9cSEMICONDUCTOR DEVICE MANUFACTURING METHODxe2x80x9d. In this manufacturing method, first, the opening portion is formed in the interlayer insulating layer. When, the side wall made of the insulating film is formed on this opening portion, the following restriction can be avoided. That is, the size of the under-layer wiring line is restricted by the size of this opening portion. This under-layer wiring line is connected via this opening portion to the upper-layer wiring line, and is located at the under layer of this opening portion.
Japanese Laid-open Patent Application (JP-A-Heisei 9-63989) describes xe2x80x9cSEMICONDUCTOR DEVICExe2x80x9d. As the method for opening the contact hole in the multi-layer insulating film made of more than 2 sorts of insulating films, when the wet etching treatment is employed, neither the concave portion, nor the convex portion is formed on the side surface of the contact hole.
Also, Japanese Laid-open Patent Application (JP-A-Heisei 7-335758) describes xe2x80x9cMETHOD FOR FORMING MULTILAYER METAL WIRING LINExe2x80x9d. This conventional forming method corresponds to the multi-layer metal wiring line forming method capable of preventing the interlayer insulating film from being moisture-absorbed. Concretely speaking, this multi-layer metal wiring line forming method is composed of a following set of steps. A step for forming the under-layer metal wiring line in a portion of the multi-layer metal wiring line. And a step for forming the oxide silicon film as the first interlayer insulating film on this under-layer metal wiring line. And a step for forming the insulating film having a higher moisture absorption characteristic and made of the SOG film as the second interlayer insulating film on this first interlayer insulating film. And a step for forming the molecular layer having a hydrophobic property on this second interlayer insulating film. And a step for forming the silicon oxide film as the third interlayer insulating film on this molecular layer. And a step for etching the first interlayer insulating film, the second interlayer insulating film, the molecular layer, and the third interlayer insulating film to form desirable shapes thereof. And also a step for forming the upper-layer metal wiring line while covering the entire multi-layer metal wiring line.
The present invention is accomplished to solve the above-mentioned problems.
Therefore, an object of the present invention is to provide a semiconductor device and a manufacturing method for the same, in which the semiconductor device can be prevented from deterioration of a low dielectric constant film.
Another object of the present invention is to provide a semiconductor device and a manufacturing method for the same, in which the semiconductor device can be prevented from deterioration of a low dielectric constant film when a plug is formed in the low dielectric constant film.
Still another object of the present invention is to provide a semiconductor device and a manufacturing method for the same, in which the semiconductor device can be prevented from deterioration of a low dielectric constant film when a wiring line groove is formed in the low dielectric constant film.
In order to achieve an aspect of the present invention, a semiconductor device includes a wiring line layer formed on a substrate, a dielectric constant film formed on the wiring line layer, an upper protection film formed on an entire portion of the dielectric constant film, an opening portion formed through the upper protection film and the dielectric constant film to the wiring line layer, and a conductor buried portion formed into the opening portion. Here, the dielectric constant film has a smaller dielectric constant value than those of a silicon oxide film and silicon nitride film.
The semiconductor device may further include a side protection film formed on all side portions of the opening portion.
In the semiconductor device, an uppermost layer of the wiring layer may includes an insulating portion made of insulating materials, and an electrically conductive portion made of electrically conductive materials. Here, at least a part of the electrically conductive portion is exposed by the opening portion.
In the semiconductor device, the conductor buried portion may be made of material selected from the group consisting of tungsten, aluminum, and copper.
In the semiconductor device, the dielectric constant film may be made of material selected from the group consisting of HSQ, xerogel, hydrogen organo siloxane polymer, methyl silsesquixane, poly-tetra-fluoroethylene, fluorinated poly-aryl-ether, poly-para-xylylene, and benzo cyclobutene, and silicon low K polymer.
In the semiconductor device, the upper protection film may be made of silicon nitride.
In the semiconductor device, the side protection film may be made of silicon oxide.
In the semiconductor device, the insulating portion may be made of silicon nitride.
In order to achieve another aspect of the present invention, a method of manufacturing a semiconductor device includes a set of steps of forming a dielectric constant film on a wiring line layer formed on a substrate, forming an upper protection film made of silicon nitride on the dielectric constant film, forming an opening portion through the upper protection film and the dielectric constant film to the wiring line layer by selectively etching the dielectric constant film, and burying an electrically conductive material into the opening portion to form a conductor buried portion. Here, the dielectric constant film has a smaller dielectric constant value than those of a silicon oxide film and silicon nitride film. Also, the upper protection film may function as an etching mask.
The method of manufacturing a semiconductor device may further include a step of forming a side protection film on all sides of the dielectric constant film exposed at the opening portion.
In the method of manufacturing a semiconductor device, the opening portion may include a hole for forming a contact plug and/or a groove for forming a wiring line.
In the method of manufacturing a semiconductor device, an uppermost layer of the wiring layer may include an insulating portion made of silicon nitride and an electrically conductive portion made of electrically conductive materials. Also, the step of forming the opening portion may be controlled to form the opening portion through the upper protection film and the dielectric constant film to at least a part of the electrically conductive portion.
In the method of manufacturing a semiconductor device, the electrically conductive portion may include a metal wiring line and/or a contact plug.
In the method of manufacturing a semiconductor device, the step of burying the electrically conductive material may include a step of burying the electrically conductive material into the opening portion. Also, the side protection film may be formed on the all sides of the opening portion.
In the method of manufacturing a semiconductor device, the step of forming the upper protection film may include a set of steps of forming a silicon nitride film on an entire portion of the dielectric constant film, forming a resist mask on the silicon nitride film, and selectively etching the silicon nitride film using the resist mask.
In the method of manufacturing a semiconductor device, the step of forming an opening portion may further include a step of controlling an etching amount to the dielectric constant film such that the wiring line layer is not reacted with etching gas. Also, the step of forming a side protection film may include a set of steps of forming a covering oxide film covering an entire semiconductor structure containing the opening portion, anisotropically etching the covering oxide film to the wiring line layer located at a lower portion of the opening portion until the wiring line layer is exposed.
In the method of manufacturing a semiconductor device, an uppermost layer of the wiring layer may include an insulating portion made of a silicon nitride film, and an electrically conductive portion made of electrically conductive materials. Also, at least a part of the electrically conductive portion may be exposed at a bottom of the opening portion before the step of burying an electrically conductive material. Moreover, the step of forming the side protection film may further include a step of removing a reacted article produced by reacting with the exposed wiring line layer and the etching gas used in the step of anisotropically etching the covering oxide film before the step of burying an electrically conductive material.
In the method of manufacturing a semiconductor device, the step of removing the reacted article may include a step of cleaning the opening portion with organic solvent.
In the method of manufacturing a semiconductor device, the organic solvent may contain amine.
In the method of manufacturing a semiconductor device, the organic solvent may contain material selected from the group consisting of hydroxylamine, mono-ethanolamine, and N-methyle ethanolamine.
In the method of manufacturing a semiconductor device, the step of forming the covering oxide film may include a step of forming a silicon oxide film by a CVD (chemical vapor deposition) method to cover an entire semiconductor structure containing the opening portion.
In the method of manufacturing a semiconductor device, a film thickness of the covering oxide film may be substantially 30 to 40 nm.
In the method of manufacturing a semiconductor device, the conductor buried portion may be made of material selected from the group consisting of tungsten, aluminum, and copper.
In the method of manufacturing a semiconductor device, the electrically conductive portion may be made of material selected from the group consisting of tungsten, aluminum, and copper.
In the method of manufacturing a semiconductor device, the step of forming an opening portion includes the step of selectively etching the dielectric constant film with an etching gas. And the etching gas may be made of material selected from the group consisting of carbon/fluorine mixed gas, carbon/fluorine-mixture-gas mixed with hydrogen gas, carbon/fluorine-mixture-gas mixed with argon gas, and carbon-fluorine-mixture gas mixed with both hydrogen gas and argon gas.
In the method of manufacturing a semiconductor device, a film thickness of the upper protection film may be thicker than a {fraction (1/10)} film thickness of the dielectric constant film.
In the method of manufacturing a semiconductor device, the dielectric constant film may be made of material selected from the group consisting of HSQ, xerogel, hydrogen organo siloxane polymer, methyl silsesquixane, poly-tetra-fluoroethylene, fluorinated poly-aryl-ether, poly-para-xylylene, and benzo cyclobutene, and silicon low K polymer.
In order to achieve still another aspect of the present invention, a method of manufacturing a semiconductor device includes a set of steps of forming a dielectric constant film on a wiring line layer formed on a substrate, forming an opening portion through the dielectric constant film to the wiring line layer, forming a side protection film on all sides of the dielectric constant film exposed at the opening portion, and burying an electrically conductive material into the opening portion to form a conductive buried layer. Here, the dielectric constant film has a smaller dielectric constant value than those of a silicon oxide film and silicon nitride film. Also, an uppermost layer of the wiring line layer includes an insulating portion and an electrically conductive portion. Moreover, at least a part of the electrically conductive portion is exposed at the bottom of the opening portion.
The method of manufacturing a semiconductor device may further include a step of forming an upper surface protection layer on an entire upper surface of the dielectric constant film.
In the method of manufacturing a semiconductor device, the step of forming a side protection film may include a set of steps of forming a silicon oxide film by a chemical vapor deposition method to cover an entire semiconductor structure containing the opening portion, and anisotropically etching the silicon oxide film until the wiring line layer located at a lower portion of the opening portion is exposed.
In the method of manufacturing a semiconductor device, the organic solvent may contain amine.
In the method of manufacturing a semiconductor device, the organic solvent may contain material selected from the group consisting of hydroxylamine, mono-ethanolamine, and N-methyle ethanolamine.
In the method of manufacturing a semiconductor device, a film thickness of the covering oxide film may be substantially 30 to 40 nm.
In the method of manufacturing a semiconductor device, the electrically conductive material may be made of material selected from the group consisting of tungsten, aluminum, and copper.
In the method of manufacturing a semiconductor device, the step of forming an opening portion may include the step of selectively etching the dielectric constant film with an etching gas, and the etching gas is made of material selected from the group consisting of carbon/fluorine mixed gas, carbon/fluorine-mixture-gas mixed with hydrogen gas, carbon/fluorine-mixture-gas mixed with argon gas, and carbon-fluorine-mixture gas mixed with both hydrogen gas and argon gas.
In the method of manufacturing a semiconductor device, the dielectric constant film may be made of material selected from the group consisting of HSQ, xerogel, hydrogen organo siloxane polymer, methyl silsesquixane, poly-tetra-fluoroethylene, fluorinated poly-aryl-ether, poly-para-xylylene, and benzo cyclobutene, and silicon low K polymer.